1. Field of the Invention
The present invention relates to a clock generating scheme, and more particularly, to an apparatus and related method for generating an output clock.
2. Description of the Prior Art
As is well known by those skilled in this art, High-Definition Multimedia Interface (HDMI) is an interface for transmitting video/audio data. Data transmitted to the receiving end of the HDMI only includes data for the frequency of a video clock signal. Recovering the frequency of an audio clock signal can be obtained by the following equation:N×fv=CTS×128×fa,  Equation (1)
wherein fv is the frequency of the video clock signal and fa is the frequency of the audio clock signal; N and CTS are parameters included in information frames respectively. In general, a prior art scheme performs a frequency-division operation upon the frequency of the video clock signal (i.e. fv) to derive a signal having a frequency fv/CTS, and then performs the operation of a phase-locked loop (i.e. a frequency divider, placed on the loop path, performs a frequency-division operation with a division factor N) upon the signal having the frequency fv/CTS to derive a signal having another frequency N*fv/CTS. Finally, the prior art scheme also performs another frequency-division operation upon the signal having the frequency N*fv/CTS with a division factor 128 to derive a signal having a frequency N*fv/(CTS*128). In the HDMI specification, however, parameters N and CTS are defined with 20 bits since they need to have sufficient accuracy. Moreover, to achieve much higher accuracy, the parameter N is almost equal to 11648, and the parameter CTS is a value between tens of thousands and hundreds of thousands. Therefore, in circuit design, it is very difficult for the prior art scheme to perform the above-mentioned operations. The prior art scheme also easily suffers from noise interference.